RFC: ONNX Import into torch-mlir
Hey folks, as mentioned on another thread, I’m working on a POC to import ONNX directly into torch-mlir. Here is the initial implementation: DRAFT: Initial ONNX importer. by stellaraccident · Pull...
View ArticleFIRRTL dialect: Linking ConnectOp with connectable FIRRTL Operations
Greetings. I have a question about FIRRTL dialect. As far as I know, ConnectOps have a link to a connectable operation via getDefiningOp() method in Value MLIR class. Is there any other way which one...
View ArticleLowering from CHIRRTL to LowFIRRTL
Greetings! I have a couple of questions concerning lowering from CHIRRTL to LowFIRRTL. Can one do something with wires (in LowFIRRTL)? Particularly, is there any pass in FIRRTL which can delete wires...
View ArticleHow to export submodule ports in HW Module using `arcilator --state-file`
I’m currently working with a hardware module described in MLIR and I’ve encountered an issue with Arcilator where I am unable to trace the inner ports of submodules. I have a simple hardware module as...
View ArticleBuilding CIRCT
Hello everyone! When I build “Release” CIRCT with the options described in GettingStarted, I get a pretty big build (CIRCT sources + build 4+ GB). Is there anything that could be done to get a build...
View ArticleFIRParser 'declgroup' token
Hello! I have a question about FIRParser. When I am parsing from .fir file that has declgroup construct I am getting this error: error: unexpected token in circuit. FIRRTL version 3.2.0. Why is that?...
View ArticleEnzymeCon 2024 is 3/25-3/27 (talk deadline 1/20)
EnzymeCon 2 will be Mar 25-27 at MIT. We’re accepting talk, tutorial, hackathon, etc submissions until 1/20. If you’re interested in AD, compilers, and more, please consider attending! Last year we...
View ArticleReleaseWithDebInfo-Clang omits LLVM and CIRCT include directories
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View ArticleReleaseWithDebInfo-Clang omits LLVM & CIRCT include directories
Hey everyone. Right now I am working on a project which utilizes CIRCT (+MLIR, +LLVM) infrastructure and while trying to build it, I am running into an error, which I can’t manage to decipher given I...
View ArticleFirtool - how do I remove the header?
I am generating some .sv files that I am committing to git. Therefore I would like to exclude this header, since it will change from version to version and only the changes to the .sv file are...
View ArticleFIRParser 'Probe'
Greetings! I have a question concerning FIRRTL specification version 3.2.0. On page 13 there is a construct that FIRRTL Parser does not consider valid: output _a: Probe<UInt<1>, Bar>. When...
View ArticleFirtool integration
Hello! I have a question about firtool. I want to integrate FIRRTL dialect, which is present in firtool, into my project. I have downloaded the latest release version, but I’m not sure how to properly...
View ArticleRFC: Discontinuing pytorch 1 binary releases
Quick show of hands: who is still using the binary nightly releases that we build and publish? All of the folks I know are either using the project for dev or as a library. Please speak up if you are...
View ArticleRFC: Rename torch_mlir.compile APIs and introduce FX based analogs
Hi folks – I’ve been fielding numerous questions/confusion over the last few weeks related to torch_mlir.compile being the API for the project. Most people are (rightly) confused because this is...
View ArticleHow to generate Conv2d in NHWC format
Hi, I’m trying to generate NHWC format conv2d. The code I used: net = torchvision.models.resnet18(weights=torchvision.models.ResNet18_Weights.DEFAULT) net = net.to(memory_format=torch.channels_last) a...
View ArticleHGLDD format description
Hi, I am developing an open-source waveform viewer for Chisel. I am using the HGLDD file generated from the firtool. However, I have based the parsing of its values on what I understood by inspecting...
View ArticleFIRRTL Dialect InstanceOp Verilog Parameters
Hello everyone. I am trying to make use of external modules in my work and up to now I haven’t seen any examples in CIRCT FIRRTL, where an instance of an external module is parametrized. We can...
View ArticleFIRRTL CatPrimOp semantics
Hello! I have a question about the semantics of concatenation operation. From the FIRRTL spec: cat (e1,e2). The result of the concatenate operation is the bits of e1 concatenated to the most...
View ArticleEnzymeCon Live Stream Links
We’re trying our best to live stream the talks (though our AV may go down). The full schedule of talks for EnzmyeCon is here: Enzyme Conference 2024 Day 1:...
View ArticleHGLDD wrong var_name reference?
Hello, I was updating my demo project after my PR has been approved (Make firtool options for `elaborateGeneratedModule` in `workspace` pa… · chipsalliance/chisel@9177535 · GitHub). However, when I...
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